Many companies struggle with issues such as poor solder flow, excessive void formation, variable reflow temperature arising from offeutectic compositions, heterogeneous phase distribution, and others, all contributing to development delays, process yield loss, and field reliability issues. Conventional smt solder joints are designed to form an equilibrium shape through the action of liquid surface tension as the. Nov 01, 2019 the biggest cumulated area of void scanned has an apparent diameter of 48. Factors leading to ionic migration in leadfree solder. This study examines damage initiation and propagation in solder joints with voids, under thermomechanical cyclic loading. Voids in solder joints, by raiyo f, aspandiar, intel corp 2. Platedthroughhole a hole with plating on its walls supported hole that makes an electrical connection between conductive patterns on internal layers, external layers, or both, of a printed board. The reflow process convection vs vapor phase hawker richardson. The reflow process convection vs vapor phase hawker. Figure 8 warpage related solder joint open at corner ball 16x, bse sem image, ref.
The results of this investigation indicate that leadfree solder suppresses the cathodic deposition reaction by forming a stable passivity film that prevents the anodic dissolution reaction. Solder falling back into the solder wave during separation and splashing back onto your board. Solder may overhang the pad but must not touch the nonsoldered portion of the component package body. Xray images of large voids in lts legs 41 chee chee solder paste mid solder joint location 100% bi mixing in balls. Processinduced solder voids have threedimensional shapes and show spatially random.
Void reduction in bottom terminated components using. Semiconductor packagings solder void criteria is getting tighter overtime due to involvement of high usage in automotive industry. Planar micro voids, or champagne voids, occur at the pwb landto solder joint interface. Pdf formation and behavior of kirkendall voids within. Thus even with vacuum reflow, the debate remains regarding the effect of voiding on solder joint reliability. Design and assembly process implementation for bottom. The root cause of voids in bga solder joints is well understood by the electronics industry with a number of papers published on the topic 1, 2, 3. Defect formation processs solder joint voiding has been extensively studied and formation of some types of voids.
Crosssectioning may also be required to determine the fillet shape, size, and the joint standoff height during process development. Lowvoiding solder pastes in led assembly emerald insight. Overstress 4 lu, yudong, xiaoqi he, yunfei en, and xin wang. Oct 02, 2016 we can then combine the ipc610 heightpercentage value with the true volume in a more stringent rule. Leadfree soldering for space applications leadfree. No solder paste fill results in increased voids propensity. Pinhole a small hole that penetrates from the surface of a solder connection to a void of indeterminate size within the solder connection.
Understanding voids in flip chip interconnects ieee electronics. Large bubbles are attached to the ubm and do not escape. A typical reflow profile for noclean solder paste is shown in figure 12, temperature measured at the solder joint. His analysis, summarized in figure 1, shows that there are multiple types of voids and multiple void formation mechanisms. It is also possible to solder throughhole pin in paste components by printing solder paste in and over the holes. Processing and reliability issues for eutectic ausn solder joints. Soldering and mounting techniques on semiconductor. As simulated with a compactness of 80% in the studied part of the solder volume, this size of voids would produce a variation of 10 mpa. Xray methods are the predominate method for solder void analysis but this method. Class iii voids or better are the most desirable, being voids less than nine percent of the solder area. Flux effect on void quantity and size in soldered joints. Voids present in solder joints that can lead to local stress concentration and crack initiation upon the exposure to environmental stresses such as temperature cycling and vibration.
Aspandiar, voids in solder joints, smta journal, v19, issue 4, 2006 pinhole microvoids. According to ipc guidelines, the amount and size of solder voids are simply to. Partial wetting void near t3 interface imc present. Figure 1 illustrates aspandiar s solder joint void classifications. Location of void class i class ii class iii void in solder solder sphere 60% of diameter 36% of area 45% of diameter 20. Solder joint voids center for advanced life cycle engineering. Bga solder void correlation to viainpad, via fill, surface finish, and leadfree. Data suggests that voiding is not a reliability issue until part pitch equals 0. Solder is melted in order to adhere to and connect the pieces after cooling, which requires that an alloy suitable for use as solder have a lower melting point than the pieces being joined. There is general consensus within the industry that. Overview of selected issues related to soldering intechopen.
Cavities opens voids reduce the circumferential wetting of lead and barrel, land coverage and vertical solder fill below minimum acceptable requirements. Voidfree soldering with a new vaporphase with vacuum technology. Figure 1 from vacuum reflow process characterization for void. Obviously, this trend depends on the total void ratio that has to be treated in an additional design of experiments. An initial sample size of either 16 or 32 was used for package surface finish nipdau figure 1. Addressing the issues around solder joint voids in surface. However, sweatman et al showed that vacuum reflow by itself does not ensure a void free solder joint 18. Equal to the solder thickness plus 25%, or equal to the solder thickness plus 0. Solder interconnect reliability is influenced by environmentally imposed loads. Xray methods are the predominate method for solder void analysis but this method can be quite subjective for non grid array components due to the two dimensional aspects of xray images and software limitations. Avoiding the solder void richard lathrop heraeus inc. Aspandiar, voids solder joints, smta j 19, 28 2006. Smt magazine may 20 soldering technology br publishing, inc.
Investigate solder joint reliability of sac bga component attached with eutectic tinlead solder solder joint reliability of snagcu bga component attached with eutectic pbsn solder paste, fay hua, raiyo aspandiar, tim tothman, cameron anderson, greg clemons, mimi klier, intel corp, materials. The focus of this work is to mitigate voids for via in pad circuit board designs. The last will and testament of the bga void circuit insight. Planar micro voids are a risk for reliability failures. The typical void is the via diameter to a depth of approximately the bump height. Raiyo aspandiar has worked at intel corporation in the boards and system. Accurately capturing systemlevel failure of solder joints. Voids can be differentiated with respect to how they are formed, where they reside in the solder joint and how they affect the reliability of the solder joint. Impact of intermetallic growth on the mechanical strength. Expect this approach to eliminate the stress riser created by a void at the edges of the via barrel. Studies to examine void reductionin leadfree ball grid array bga and bottom terminated components btc have been. Ramakrishna, kirkendall voids at cusolder interface and their effects. For control, bgas with traditional 63sn37pb solder balls were also assembled, with 63sn37pb solder paste and with the sn4ag0. Solder paste can be manufactured in hundreds of alloys and with powder size ranging from type 3 to type 8.
Previously published works by our company outline the benefits of utilizing a low voiding solder paste formulation to alleviate both mechanical and electrical issues associated with pb. There are several theories on the mechanism that creates planar micro voids, but there is no industry consensus on the causal mechanism. Overheated solder has a dull, gray, frosty andor crystallized appearance and is the result of excessive exposure. The solder temperature being too high in the wave soldering machine. An accelerated thermal cycling test is conducted on printed wiring assemblies pwas containing 256 inputoutput io plastic ball grid arrays pbgas with voided solder joints. Imaging and analysis of void defects in solder joints formed in reduced gravity using highresolution computed tomography as a part of efforts to develop an electronics repair capability for long duration space missions, techniques and materials for soldering components on a circuit board in reduced gravity must be developed. In proceedings of the 2017 smta international conference, pp. Currently, raiyo is working on and lowtemperature soldering development. Solid model of voids in bumps created by via in pad board design finite element analysis was used to simulate the effects of this void and no increase in stress at the critical diebump interface was found.
Platedthrough hole a hole with plating on its walls supported hole that makes. As the qfn package incorporates a large center pad, controlling solder voiding within this region can be difficult. Overcoming the challenges of the qfn package, by karl seelig and kevin pigeon 4. Aspandiar backward compatibility, are we ready a case study. Vacuum reflow process characterization for voidless. Noclean solder paste is by far the most prevalent solder paste in modern electronic manufacturing, but there is still a purpose and a fit for watersoluble and rma solder paste as well. Ipc solder products value council, the effect of voiding in solder interconnections formed from leadfree solder. Figure 1 shows a comprehensive summary by aspandiar 6 describing the types. Additionally, the authors analysed void content in solder joints under center and terminal. Characterization of mixed alloy sacbisn bga solder joints. Solder balling occurs when a small bit of soldier attaches itself to the surface of your pcb during the wave soldering process.
Philadelphia, pa abstract solder voiding is present in the majority solder joints and is generally accepted when the voids are small and the total void content is minimal. In highreliability applications, filled vias are preferred due to lower incidences of voiding during reflow. Solder paste solders products made by indium corporation. The vacuumcondensation processes significantly reduced the voids in the sn3. The sticky paste temporarily holds components in place. Aspandiar published voids in solder joints find, read and cite all the research you need on researchgate. Semiconductor packaging component maker starts to strengthen the solder joint quality and electrical power conductivity by tighten the solder void requirement through seeking a solution in controlling the maximum solder void size reduction from 1015% original. Ipc7095c design and assembly process implementation for. Tests have been conducted at 210 to 230c and results show that there will not be solderability issues. Mar 20, 2018 voids in solder joints voids in solder joints raiyo aspandiar intel corporation raiyo. A computational investigation of the effect of threedimensional void. Solder joint void characterization and failure analysis. The effect of pb mixing levels on solder joint reliability and failure mode of backward compatible, high density ball grid array assemblies richard coyle1, raiyo aspandiar2, vasu vasudevan2, steve tisdale3, iulia muntele4, richard popowich1, debra fleming1, and peter read1 1alcatel lucent, murray hill, nj 07974 2intel corporation, hillsboro, or 97124.
Solder reflow issues solder voiding is a frequently reported problem for bga solder reflow. Damage initiation and propagation in voided joints. Addressing the issues around solder joint voids in. The may issue of smt magazine focuses on soldering issues, including voiding in qfn packages and gull wing joints, the. The use of a low pressure vacuum when the solder alloy is in liquidus conclusively results in a significant reduction of observable voids in each combination of surface finish and reflow process condition. Solder paste or solder cream is used in the manufacture of printed circuit boards to connect surface mount components to pads on the board. However, with some methods showing that voiding can be. Solder voiding within surface mount technology smt of. These volatiles cannot escape as easily, and voids are created when these compounds remain in the body of the solder once the material is solidified. These results indicate that leadfree solder can be considered more reliable than conventional leaded solder with regard to ionic migration. Comparison study on reliability performance for polymer. Lowtemperature solder pastes raiyo aspandiar intel corporation raiyo.
There are varying viewpoints on the effect of vias and allowable quantity. Defect formation processs solder joint voiding has been extensively studied and formation of some types of voids are included here. Solder voiding is present in the majority solder joints and is generally accepted when the voids are small and the total void content is minimal. Aspandiar, voids in solder joints, smta journal, v19, issue 4, 2006 plugged via inverted via mitigation. Kirkendall voids are created at the interface of two. Aspandiar characterized and classified bga solder joint voids into several categories with assigned root causes that are widely utilized as the industry void. Over the last few years we have studied voiding in solder joints and published three technical papers on methods to fill the void. An accelerated thermal cycling test is conducted on printed wiring assemblies pwas containing 256 inputoutput io plastic ball grid arrays pbgas with voided solder. Richard coyle characterization of void growth in bga solder balls through two smt reflow soldering cycles581 alan donaldson, raiyo aspandiar. Voids are a plague to our electronics and must be eliminated. Macro void studies research focuses on bgas and pbfree solder. Axi systems with a flexible programming interface allow more rules to be added or logically combined, such as rules for void dimension, void distribution, void number, solder volume to solder height ratio, and so on. Inclusion voids observed in smt gullwing solder joints with 2d xray a, b and cross section c, d. Nonwetting the partial adherence of molten solder to a surface that it has contacted and basis metal remains exposed.
Fu, haley, raiyo aspandiar, jimmy chen, shunfeng cheng, qin chen, richard coyle, sophia feng et al. May 01, 2016 all voids on the photos were marked and categorized according to voids size for each used combination of flux and solder paste. Xray images of large voids in lts legs 41 chee chee solder paste mid solder joint location. Platedthrough hole a hole with plating on its walls supported hole that makes an electrical connection between conductive patterns on internal layers, external layers, or both, of a printed board. Voids in solder joints voids in solder joints raiyo aspandiar intel corporation raiyo. However, with some methods showing that voiding can be present with a mean value of 14%, with some. Ipc7095c design and assembly process implementation for bgas. Located in one plane at the landto solder interface above the imc yield loss is low, reliability risk is high cause. Voids in solder joints are largely a function of differential pressure between vapor pressure of the gases inside of the joint and environmental conditions. Void reduction in bottom terminated components using vacuum.
Bottom terminated or noleaded devices such as quad flat nolead devices qfn are becoming commonplace. Whisker growth from leadfree solder it is believed that whiskers are specific to tin plating and in general do not grow from solder several publications discussing whisker growth from solder sn whiskers in sn3ag0. Voids in solder joints, raiyo aspandiar, senior materials scientist, intel corporation, board technology segment integration gr oup, september 21, 2005, smta northwest chapter meeting. Enig voids, excess phosphorous larger voids are formed when small voids bump into each other. The criteria for diversification was based on work by subbarayan g.
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